The following paper has been accepted for publication in IEEE Sensors Letters. This is a joint work with National Institute of Advanced Industrial Science and Technology.
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The following paper is accepted by IEEE Access. This is a collaborative work with Tokyo Institute of Technology.
Á. L. García-Arias, Y. Okoshi, M. Hashimoto, M. Motomura and J. Yu, “Recurrent Residual Networks Contain Stronger Lottery Tickets,” in IEEE Access, doi: 10.1109/ACCESS.2023.3245808.
The following papers have been accepted for publication in Japanese Journal of Applied Physics (JJAP). This is an outcome of the joint work with National Institute of Advanced Industrial Science.
The following paper is accepted by IEEE Transactions on Circuits and Systems II. This is a collaborative work with Southern University of Science and Technology.
Q. Cheng, L. Dai, M. Huang, A. Shen, W. Mao, M. Hashimoto, H. Yu, “A Low-Power Sparse Convolutional Neural Network Accelerator with Pre-Encoding Radix-4 Booth Multiplier,” in IEEE Transactions on Circuits and Systems II: Express Briefs, doi: 10.1109/TCSII.2022.3231361.
The following paper has been accepted for publication in IEEE Transactions on Power Electronics (TPEL).
The paper below has been accepted for publication.
Y. Zhang, H. Itsuji, T. Uezono, T. Toba, and M. Hashimoto, “Vulnerability Estimation of DNN Model Parameters with Few Fault Injections,” IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, early access.
DOI:10.1587/transfun.2022VLP0004
The following paper has been accepted for the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES) 2022 during Embedded Systems Week (ESWEEK), scheduled for October 7-14, 2022. (The paper will be presented at ESWEEK and published in TCAD).
Sosei Ikeda, Hiromitsu Awano, and Takashi Sato, “Hardware-friendly delayed feedback reservoir for multivariate time series classification,” IEEE Transactions on Computer-Aided Design of integrated circuits and systems (TCAD), doi: 10.1109/TCAD.2022.3197488.
The following paper has been accepted for publication in IEEE Transactions on Computers (TC). This is an international collaborative paper with the University of Notre Dame, IBM, Beihan University, Fudan University, and other universities in the United States.
The following paper has been accepted for publication in Japanese Journal of Applied Physics (JJAP). This is a progress review article associated with the plenary talk given by Prof. Hashimoto at International Conference on Memristive Materials, Devices & Systems (MEMRISYS) 2021.
M. Hashimoto, X. Bai, N. Banno, M. Tada, T. Sakamoto, J. Yu, R. Doi, H. Onodera, T. Imagawa, H. Ochi, K. Wakabayashi, Y. Mitsuyama, and T. Sugibayashi, “Via-Switch FPGA with Transistor-Free Programmability Enabling Energy-Efficient Near-Memory Parallel Computation,” Japanese Journal of Applied Physics, in press, https://doi.org/10.35848/1347-4065/ac6b81.
The following paper has been accepted for publication in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). This research was closely discussed at the Technical University of Munich in the early days of this research.