The paper below has been accepted for publication in IEEE Transactions on Circuits and Systems I: Regular Papers.
Q. Cheng, M. Huang, C. Man, A. Shen, L. Dai, H. Yu, and M. Hashimoto, “Reliability Exploration of System-On-Chip with Multi-Bit-Width Accelerator for Multi-Precision Deep Neural Networks,” IEEE Transactions on Circuits and Systems I: Regular Papers, in early access, DOI: 10.1109/TCSI.2023.3300899.