Month: April 2025

The following paper has been accepted to the Symposium on VLSI Technology and Circuits. We will be presenting it in Kyoto this June

Quan Cheng, Qiufeng Li, Zhengke Yang, Zhen Kong, Gaoqiang Niu, Yuan Liang, Jiamin Li, Jeong Hoan Park, Wang Liao, Hiromitsu Awano, Takashi Sato, Longyang Lin, Masanori Hashimoto, “A Radiation-Hardened Neuromorphic Imager with Self-Healing Spiking Pixels and Unified Spiking Neural Network for Space Robotics,” Digest of Symposium on VLSI Technology and Circuits, to appear.

At the Custom Integrated Circuits Conference (CICC 2025) held in Boston, USA from April 14th to April 16th, 2025, Hashimoto presented the research findings on behalf of Cheng (presentation date: April 16th, 2025).

Q. Cheng, Q. Li, W. Dong, M. Zhang, R. Zhang, M. Huang, H. Yu, Y. Shi, H. Awano, T. Sato, L. Lin, and M. Hashimoto, “A 22nm Resource-Frugal Hyper-Heterogeneous Multi-Modal System-On-Chip Towards In-Orbit Computing,” Proceedings of IEEE Custom Integrated Circuits Conference (CICC), 2025.

The following papers have been accepted to IEEE International NEWCAS Conference, to be held in Paris, France, in Jun 2025.

• Hiroaki Kitaike, Ruilin Zhang, Hironori Tagawa, Kento Okamura, Kei Awano, You Wu, Teruaki Ono, Kohei Sakamoto, Jin Nakamura, Masaya Kaneko, Yuta Kimura, Hiroaki Nakamura, Kunyang Liu, Shufan Xu, Hirofumi Shinohara and Kiichi Niitsu, “A 22nm CMOS 0.000005mm2 0.25V 2.3pW ISFET Front-End Using Low-Gate-Leakage Thick-Gate- Oxide Transistors for Energy-Efficient Small- Formfactor Ph Monitoring,”

Hashimoto presented research findings at the Design, Automation and Test in Europe Conference (DATE 2025) held in Lyon, France from March 31st to April 2nd, 2025 (presentation date: April 2nd, 2025).

Q. Cheng, W. Liao, R. Zhang, H. Yu, L. Lin, and M. Hashimoto, “HachiFI: a Lightweight SoC Architecture-Independent Fault-Injection Framework for SEU Impact Evaluation,” Proceedings of Design, Automation and Test in Europe Conference (DATE), March 2025.