The following paper has been accepted for presentation at the IEEE Applied Power Electronics Conference and Exposition (APEC) 2022. APEC is one of the top conferences in power electronics.
The paper below has been accepted by British Machine Vision Conference. This research is a result of the CREST project on optical neural networks.
A. Lopez, M. Hashimoto, M. Motomura, and J. Yu, “Hidden-Fold Networks: Random Recurrent Residuals Using Sparse Supermasks,” Proceedings of British Machine Vision Conference (BMVC), to appear.
IThe following paper has been accepted for publication in IEEE Transactions on Power Electronics (TPEL).
Michihiro Shintani, Aoi Ueda, and Takashi Sato, “Accelerating Parameter Extraction of Power MOSFET Models Using Automatic Differentiation,” IEEE Transactions on Power Electronics (TPEL), (accepted for publication).
The following paper has been accepted to ACM Workshop on Encrypted Computing & Applied Homomorphic Cryptography (WAHC).
Kotaro Matsuoka, Yusuke Hoshizuki, Takashi Sato and Song Bian, “Towards better standard cell library: Optimizing compound logic gates for TFHE,” in Proc. ACM Workshop on Encrypted Computing & Applied Homomorphic Cryptography (WAHC), November 2021. (accepted for presentation)
The paper below has been accepted for SIGGRAPH Asia 2021.
R. Shirai and M. Hashimoto, “Submarine LED: Wirelessly powered underwater display controlling its buoyancy,” SIGGRAPH Asia 2021 Posters, to appear.
This research has been executed in response to support of KIOXIA Corporation.
Assistant Prof. Shirai received Best Paper Award from the Virtual Reality Society of Japan regarding the paper below (2021/9/13).
Y. Itoh, Y. Ishihara, R. Shirai, K. Fujita, K. Takashima, and T. Onoye, “StickyTouch: A Touch Display with Controllable Local Adhesion,” Transactions of the Virtual Reality Society of Japan (in Japanese), Vol. 25, No. 4, pp. 384-393, 2020.
The paper below has been accepted by Transactions of the Virtual Reality Society of Japan. The first author is Ms. Suzunaga who completed master’s degree at Osaka University in March 2021. This work was carried out at Osaka University with Tohoku University,
S. Suzunaga, K. Fujita, R. Shirai, and Y. Itoh, “CoiLED Display: Striped Flexible Displays Windable Around Objects, ” Transactions of the Virtual Reality Society of Japan (in Japanese), accepted, to appear.
The paper below has been accepted for publication by IEEE Journal of Solid-State Circuits.
This research is a result of the CREST project on via-switch FPGA.
X. Bai, N. Banno, M. Miyamura, R. Nebashi, K. Okamoto, H. Numata, N. Iguchi, M. Hashimoto, T. Sugibayashi, T. Sakamoto, and M. Tada, “Via-Switch FPGA: 65nm CMOS Implementation and Evaluation,” IEEE Journal of Solid-State Circuits, in press.
The following papers have benn accepted for publication by IEICE Transactions on Fundamentals. These works were carried out at Osaka University with Nagoya University and Socionext Inc.
T. Cheng, Y. Masuda, J. Nagayama, Y. Momiyama, J. Chen, and M. Hashimoto, “Activation-Aware Slack Assignment Based Mode-Wise Voltage Scaling for Energy Minimization,” IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, in press.
Y. Masuda, J. Nagayama, T. Cheng, T. Ishihara, Y. Momiyama, and M. Hashimoto, “Low-Power Design Methodology of Voltage Over-Scalable Circuit with Critical Path Isolation and Bit-Width Scaling,” IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, in press.
The paper below has been accepted for Asia and South Pacific Design Automation Conference (ASP-DAC) 2022.
Dehua Liang, Noriyuki Miura, Jun Shiomi and Hiromitsu Awano, “DistriHD: A Memory Efficient Distributed Binary Hyperdimensional Computing Architecture for Image Classification,” ASP-DAC 2022, to appear.