Accepted for publication in IEEE Transactions on Nuclear Science

The research results of the joint research with Kochi University of Technology conducted within the framework of OPERA will be published in IEEE Transactions on Nuclear Science.

T. Tanaka, W. Liao, M. Hashimoto, and Y. Mitsuyama, “Impact of Neutron-Induced SEU in FPGA CRAM on Image-Based Lane Tracking for Autonomous Driving: from Bit Upset to SEFI and Erroneous Behavior,” IEEE Transactions on Nuclear Science, accepted for publication.

Accepted for DATE 2022

The paper below is accepted for Design, Automation and Test in Europe Conference (DATE). This research was performed as the joint project with Hitachi Ltd.

Y. Zhang, H. Itsuji, T. Uezono, T. Toba, and M. Hashimoto, “Estimating Vulnerability of All Model Parameters in DNN with a Small Number of Fault Injections,” Proceedings of Design, Automation and Test in Europe Conference (DATE), to appear.

Accepted for BMVC 2021

The paper below has been accepted by British Machine Vision Conference. This research is a result of the CREST project on optical neural networks.

A. Lopez, M. Hashimoto, M. Motomura, and J. Yu, “Hidden-Fold Networks: Random Recurrent Residuals Using Sparse Supermasks,” Proceedings of British Machine Vision Conference (BMVC), to appear.

Paper accepted: WAHC2021

The following paper has been accepted to ACM Workshop on Encrypted Computing & Applied Homomorphic Cryptography (WAHC).

Kotaro Matsuoka, Yusuke Hoshizuki, Takashi Sato and Song Bian, “Towards better standard cell library: Optimizing compound logic gates for TFHE,” in Proc. ACM Workshop on Encrypted Computing & Applied Homomorphic Cryptography (WAHC), November 2021. (accepted for presentation)

Paper accepted: Transactions of the Virtual Reality Society of Japan

The paper below has been accepted by Transactions of the Virtual Reality Society of Japan. The first author is Ms. Suzunaga who completed master’s degree at Osaka University in March 2021. This work was carried out at Osaka University with Tohoku University,

S. Suzunaga, K. Fujita, R. Shirai, and Y. Itoh, “CoiLED Display: Striped Flexible Displays Windable Around Objects, ” Transactions of the Virtual Reality Society of Japan (in Japanese), accepted, to appear.

Paper accepted: IEEE Journal of Solid-State Circuits

The paper below has been accepted for publication by IEEE Journal of Solid-State Circuits.
This research is a result of the CREST project on via-switch FPGA.

X. Bai, N. Banno, M. Miyamura, R. Nebashi, K. Okamoto, H. Numata, N. Iguchi, M. Hashimoto, T. Sugibayashi, T. Sakamoto, and M. Tada, “Via-Switch FPGA: 65nm CMOS Implementation and Evaluation,” IEEE Journal of Solid-State Circuits, in press.