Category: Conference / Workshop

The following paper has been accepted at ICCAD (International Conference on Computer-Aided Design) 2025. The results will be presented in Munich in October.

• Quan Cheng, Huizi Zhang, Chien-Hsing Liang, Mingtao Zhang, Jing-Jia Liou, Jinjun Xiong, Longyang Lin and Masanori Hashimoto, “Tenpura: a General Transient Fault Evaluation and Scope Narrowing Platform for Ultra-Fast Reliability Analysis,” Proceedings of International Conference on Computer-Aided Design (ICCAD), accepted.
• Xinyi Guo, Geguang Miao, Shinichi Nishizawa, Hiromitsu Awano, Shinji Kimura, and Takashi Sato, “SOME: Symmetric One-Hot Matching Elector — A Lightweight Microsecond Decoder for Quantum Error Correction,” in Proceedings of International Conference on Computer-Aided Design (ICCAD), accepted.

Our papers have been accepted for oral presentation at the RADECS (RADiation and its Effects on Components and Systems) 2025 Conference. The conference will be held in Antwerp from September 29 to October 3.

• K. Takeuchi and M. Hashimoto, “Sensitive Volume Allocation Aligned with a Physics-Based Analytical Cross Section Model for Monte Carlo-Based Proton-Induced SEU Simulation,” European Conference on Radiation and Its Effects on Components and Systems (RADECS), to appear.
• Y. Gomi, K. Takami, R. Yasuda, H. Kanda, M. Fukuda, and M. Hashimoto, “Quasi Event-Wise Measurement of Neutron-Induced Multiple-Cell Upsets in 22-nm and 55-nm SRAMs,” European Conference on Radiation and Its Effects on Components and Systems (RADECS), to appear.

Dr. Quan Cheng, a Program-Specific Researcher, delivered a presentation on their research findings at the Symposium on VLSI Technology and Circuits 2025, which took place in Kyoto from June 8-12, 2025 (Presentation date June 12).

Q. Cheng, Q. Li, Z. Yang, Z. Kong, G. Niu, Y. Liang, J. Li, J. H. Park, W. Liao, H. Awano, T. Sato, L. Lin, and M. Hashimoto, “A Radiation-Hardened Neuromorphic Imager with Self-Healing Spiking Pixels and Unified Spiking Neural Network for Space Robotics,” Digest of Symposium on VLSI Technology and Circuits, 2025.

Sorry, this entry is only available in 日本語.

At the International Conference on Robotics and Automation (ICRA), held in Atlanta, Georgia, USA from May 19 to 23, 2025, D1 student Hara presented a poster in the Late Breaking Results Poster session.

M1 Awano-Kun’s International Conference paper is accepted to IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), which will be held in Lansing, Michigan, USA, in August 2025.

Kei Awano, You Wu, Kento Okamura, Teruaki Ono, Kohei Sakamoto, Hiroaki Kitaike, Hironori Tagawa, Jin Nakamura, Masaya Kaneko, Yuta Kimura, Hiroaki Nakamura, Shufan Xu, Ruilin Zhang, Kunyang Liu, Hirofumi Shinohara, and Kiichi Niitsu, “A 110-mV 12-pW 0.00006-mm2 7-nm FinFET Self-Oscillating Voltage Doubler Using Vertically Implemented Back-End Metal-Oxide-Metal Capacitors For Small-Formfactor Up-Conversion”, to appear.

The following paper has been accepted to European Signal Processing Conference (EUSIPCO), which will be held in Palermo, Italy in September 2025.

C. Biesinger, H. Awano, and M. Hashimoto, “Window Function-Less DFT with Reduced Noise and Latency for Real-Time Music Analysis,” Proceedings of European Signal Processing Conference (EUSIPCO), to appear.

The following paper has been accepted to International Symposium on Low Power Electronics and Design (ISLPED), which will be held in Iceland in August 2025.

Q. Cheng, H. Zhang, Q. Li, Y. Liang, M. Zhang, Z. Chen, R. Zhang, J. Xiong, M. Huang, L. Lin, and M. Hashimoto, “A Scalable External Memory Access and On-Chip Storage Architecture for Edge-AI Accelerators — Multi-Path Rolling Data Refresh and Layer-Wise Bank Allocation –,” Proceedings of IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), to appear.