This paper, a collaborative research outcome with Hitachi, Ltd., has been accepted by IEEE Access.
H. Itsuji, T. Uezono, T. Toba, K. Ito and M. Hashimoto, “A Hardware-Aware Failure-Detection Method for GPU Control-Logic,” in IEEE Access, vol. 13, pp. 113890-113904, 2025, doi: 10.1109/ACCESS.2025.3584759.
The following paper has been accepted at ICCAD (International Conference on Computer-Aided Design) 2025. The results will be presented in Munich in October.
The following two research presentations were delivered at the ACM/IEEE Design Automation Conference (DAC) 2025, held in San Francisco, USA, from June 22 to June 25, 2025. The presentations were given on June 23 (Guo) and June 24 (Tagata), respectively. DAC is a premier conference in the field of integrated circuit design.
The following paper has been accepted for publication in IEEE Sensors Letters:
Ryosuke Sada, Toshihisa Tanaka, Hisafumi Asaue, Tomoki Shiotani, Masanori Hashimoto, and Ryo Shirai, “Localization of Embedded Sensors in Reinforced Concrete via Time-Series Magnetic Field Sensing and Maximum Likelihood Estimation,” IEEE Sensors Letters, accepted, to appear.
We will also present this work at the IEEE Sensors Conference 2025, which will be held in Vancouver, Canada.
This work was conducted in collaboration with the Laboratory on Innovation for Infrastructures (ITIL), Office of Institutional Advancement and Communications, Kyoto University.
Our papers have been accepted for oral presentation at the RADECS (RADiation and its Effects on Components and Systems) 2025 Conference. The conference will be held in Antwerp from September 29 to October 3.
Dr. Quan Cheng, a Program-Specific Researcher, delivered a presentation on their research findings at the Symposium on VLSI Technology and Circuits 2025, which took place in Kyoto from June 8-12, 2025 (Presentation date June 12).
Q. Cheng, Q. Li, Z. Yang, Z. Kong, G. Niu, Y. Liang, J. Li, J. H. Park, W. Liao, H. Awano, T. Sato, L. Lin, and M. Hashimoto, “A Radiation-Hardened Neuromorphic Imager with Self-Healing Spiking Pixels and Unified Spiking Neural Network for Space Robotics,” Digest of Symposium on VLSI Technology and Circuits, 2025.
Four distinguished integrated circuit researchers visited our laboratory on June 9, 2025, to exchange ideas and deliver the following technical lectures:
Title: AI-Empowered Heterogeneous Computing for Physical Design Automation towards Timing Closure
Speaker: Prof. Yibo Lin (Peking University)
Title: Design-Agnostic Bi-Voltage Scaling for Efficient Cryo-CMOS DVFS
Speaker: Prof. Longyang Lin (Southern University of Science and Technology)
Title: Towards 2.5D/3D Composable Chiplets for AI Computing: Heterogenous Integration and Design Exploration
Speaker: Prof. Yu Kevin Cao (University of Minnesota)
Title: Co-Designing Algorithms and Hardware for Efficient Machine Learning System
Speaker: Prof. Caiwen Ding (University of Minnesota)
Sorry, this entry is only available in 日本語.
The following paper has been published at IACR TCHES. This paper is a collaborative work with Tohoku University, NTT Social Informatics Laboratories, and NEC. The paper will be presented at International Conference on Cryptographic Hardware and Embedded Systems (CHES) in September 2025.
Rei Ueno, Akira Ito, Yosuke Todo, Akiko Inoue, Kazuhiko Minematsu, Hibiki Ishikawa, and Naofumi Homma, “All You Need is XOR-Convolution: A Generalized Higher-Order Side-Channel Attack with Application to XEX/XE-based Encryptions,” IACR Transactions on Cryptographic Hardware and Embedded Systems, 2025(3), pp. 317-360, 2025. https://doi.org/10.46586/tches.v2025.i3.317-360
The following paper has been accepted for publication in IEEE Transactions on Device and Materials Reliability.
Shufan Xu, Kunyang Liu, Kiichi Niitsu and Hirofumi Shinohara, “Statistical Model and Transistor Size Effect of Hot Carrier Injection for Stability Reinforced SRAM Physically Unclonable Function,” IEEE Transactions on Device and Materials Reliability, doi: 10.1109/TDMR.2025.3574796.