Paper accepted for IEEE Journal of Solid-State Circuits

The following paper has been accepted for publication in IEEE Journal of Solid-State Circuits.

  • Kunyang Liu, Zihan Fu, Gen Li, Hongliang Pu, Zhibo Guan, Xingyu Wang, Shufan Xu, Kiichi Niitsu, and Hirofumi Shinohara, “A Physically Unclonable Function With Less Than 4.16E–7 BER Featuring Secure In-Cell HCI Burn-In and nMOS-Dominant PUF Data Generation,” IEEE Journal of Solid-State Circuits, doi: 10.1109/JSSC.2026.3663657.

Paper accepted for DAC 2026

Our paper has been accepted for presentation at the 63rd Design Automation Conference (DAC 2026), which will be held in Long Beach, California, from July 26 to 29, 2026.

Weirong Dong, Kai Zhou, Zhen Kong, Zhenke Yang, Quan Cheng, Haoyuan Li, Junkai Huang, Masanori Hashimoto and Longyang Lin, “Drift-Aware Reliability Calibration for RRAM In-Memory Computing via Vector-Based Lightweight Approach,” in Proceedings of Design Automation Conference (DAC), to appear.

ISSCC 2026

At the IEEE International Solid-State Circuits Conference (IEEE ISSCC 2026) held in San Francisco, USA, from February 15 to 19, 2026, Assistant Professor Liu presented the following paper on behalf of Ms. Xu (D3), who was unable to attend the conference (presentation took place on February 18).

  • Shufan Xu*, Kunyang Liu*, Lando Chan, Hironori Tagawa, Hirofumi Shinohara, and Kiichi Niitsu, “A Sub-Threshold All-NMOS Reconfigurable PUF with Secure Configuration Selection for Stable 6-Bits/Cell,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Tech. Dig. Papers, San Francisco, CA, USA, Feb. 2026, pp.400-401. (*Equally Credited Authors)

Dr. Quan Cheng, who was a doctoral student and later served as a Program-Specific Researcher, presented the results of our collaborative research with SUSTech (presentation date: February 17, 2026).

  • Q. Cheng*, Z. Yang*, H. Li, Q. Li, Z. Kong, G. Niu, Y. Liang, J. Li, J. Yoo, M. Hashimoto, and L. Lin, “A Radiation-Hardened Self-Healing Cmos Imager with Online Pixel/Logic Annealing and Tile-Adaptive Compression for Space Applications,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Tech. Dig. Papers, San Francisco, CA, USA, Feb. 2026, pp.390-391. (*Equally Credited Authors)

ISSCC 2026 Silkroad Award

D3 Student Xu-san’s paper won the Silkroad Award at the ISSCC 2026.
Since Xu-san was unable to attend the conference, Assistant Professor Liu attended the ceremony and accepted the award on her behalf.

“A Sub-Threshold All-NMOS Reconfigurable PUF with Secure Configuration Selection for Stable 6-Bits/Cell”

Authors: Shufan Xu*, Kunyang Liu*, Lando Chan, Hironori Tagawa, Hirofumi Shinohara, and Kiichi Niitsu (*Equally Credited Authors)

Paper accepted for IEEE Sensors Journal

The following paper has been accepted for publication in IEEE Sensors Journal. This work is the result of a collaborative research project with Yamagata University.

Y. Wang, T. Tanaka, T. Harada, M. Hashimoto, R. Shirai, “A Compact Triaxial Hall Sensor Compatible with Standard CMOS Process Leveraging Horizontal and Vertical Current Flow within Deep N-Well,” in IEEE Sensors Journal, DOI: 10.1109/JSEN.2026.3659496

Paper accepted for IEEE Transactions on Nuclear Science

The following paper has been accepted for publication in IEEE Transactions on Nuclear Science. This work is the result of a collaborative research project with JAXA.

K. Takeuchi and M. Hashimoto, “Sensitive Volume Allocation Aligned with a Physics-Based Analytical Cross Section Model for Monte Carlo-Based Proton-Induced SEU Simulation,” in IEEE Transactions on Nuclear Science, doi: 10.1109/TNS.2026.3654595.

ASP-DAC 2026

At the IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC 2026) held in Lantau Island, Hong Kong, from January 19 to 22, 2026, Mingtao, Haoyuan, and Masanori presented the following papers
(presentation dates: Jan. 20, 22, and 22, resp.). Takashi served as the TPC chair for the conference.

  • Mingtao Zhang, Quan Cheng, Masanori Hashimoto, “A SET Fault Injection Framework Towards Exhaustive System-Level Impact Evaluation,” in Proc. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), January 2026.
  • Haoyuan Li, Masami Utsunomiya, Ryuto Seki, Feng Liang, and Takashi Sato, “EMESN: An extended MOSFET reservoir computing architecture for echo state networks with hardware-software co-optimization,” in Proc. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), January 2026.
  • Quan Cheng, Haoyuan Li, Weirong Dong, Mingqiang Huang, Longyang Lin, and Masanori Hashimoto, “Gundam: A Generalized Unified Design and Analysis Model for Matrix Multiplication on Edge,” in Proc. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), January 2026.

Publication at IACR TCHES – YATA

The following paper has been published at IACR TCHES. The paper will be presented at International Conference on Cryptographic Hardware and Embedded Systems (CHES) in September 2026.

  • K. Matsuoka, and T. Sato, “YATA: Yet Another TFHE Accelerator with Key Compression and Radix-8 NTT,” IACR Transactions on Cryptographic Hardware and Embedded Systems, 2026(1), pp.325-352, 2026. doi: 10.46586/tches.v2026.i1.325-352

Paper Accepted for Publication in IEEE Transactions on Computers

The following paper has been accepted for publication in IEEE Transactions on Computers. This research is the result of a collaborative study with Waseda University.

  • Xinyi Guo, Geguang Miao, Shinishi Nishizawa, Shinji Kimura, and Takashi Sato, “Prime factorization using partially constrained multiple quantum annealing with analytical and pattern-based variable reduction,” IEEE Transactions on Computers, (accepted).