Paper Accepted to IEEE ICECS 2025

M1 Okamura-Kun’s International Conference paper is accepted to IEEE International ICECS (International Conference on Electronics Circuits and Systems) Conference.
The results will be presented in Marrakech in November.

“A 22nm CMOS 0.26nW-Standby-Power 37GHz Ingestible OOK Transmitter for Digital Pills”

Authors: Kento Okamura, Takeshi Fujiyabu, Hisataka Maruyama, Kei Awano, You Wu, Hiroaki Kitaike, Jin Nakamura, Masaya Kaneko, Yuta Kimura, Hiroaki Nakamura, Shufan Xu, Ruilin Zhang, Kunyang Liu, Hirofumi Shinohara, Daisuke Anzai, Natsuko Inagaki, Taichi Ito and Kiichi Niitsu

Paper Accepted to IEEE APCCAS 2025

M1 Awano-Kun’s International Conference paper is accepted to IEEE International APCCAS (Asia Pacific Conference on Circuits and Systems) Conference.
The results will be presented in Busan in October.

“65nm 0.0736mm2/Pixel Simultaneous Energy-Harvesting-and-Sensing 2-by-2 Self-Powered CMOS Image Sensor Pixel Array Using Self-Oscillating Voltage Doubler for Thermal-Aware Zero-Stand-by-Power Imaging”

Authors: Kei Awano, Yoshitsune Sugimura, Yuma Ota, You Wu, Keishi Ogura, Hiroaki Kitaike, Kento Okamura, Shufan Xu, Jin Nakamura, Masaya Kaneko, Yuta Kimura, Hiroaki Nakamura, Ruilin Zhang, Hirofumi Shinohara, Kunyang Liu and Kiichi Niitsu

(日本語) ITC 2025 招待講演

Rei Ueno gave a spotlight talk about information-theoretical analysis of side-channel attacks at Information-Theoretic Cryptography Conference (ITC) 2025, affiliated event of CRYPTO 2025, in UCSB, USA, on August 16th.

Akira Ito, Rei Ueno, and Naofumi Homma, “Information-Theoretical Analysis of Side-Channel Attack and Its Countermeasure,” Information-Theoretic Cryptography Conference (ITC), 2025.

ISLPED 2025

Mr. Zhang, a D2 student, presented the paper at the IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED 2025) held at the University of Iceland from August 6-8, 2025 (presentation date August 7).

Q. Cheng, H. Zhang, Q. Li, Y. Liang, M. Zhang, Z. Chen, R. Zhang, J. Xiong, M. Huang, L. Lin, and M. Hashimoto, “A Scalable External Memory Access and On-Chip Storage Architecture for Edge-AI Accelerators — Multi-Path Rolling Data Refresh and Layer-Wise Bank Allocation –,” Proceedings of IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), August 2025.

Paper accepted to ICCAD 2025

The following paper has been accepted at ICCAD (International Conference on Computer-Aided Design) 2025. The results will be presented in Munich in October.

  • Quan Cheng, Huizi Zhang, Chien-Hsing Liang, Mingtao Zhang, Jing-Jia Liou, Jinjun Xiong, Longyang Lin and Masanori Hashimoto, “Tenpura: a General Transient Fault Evaluation and Scope Narrowing Platform for Ultra-Fast Reliability Analysis,” Proceedings of International Conference on Computer-Aided Design (ICCAD), accepted.
  • Xinyi Guo, Geguang Miao, Shinichi Nishizawa, Hiromitsu Awano, Shinji Kimura, and Takashi Sato, “SOME: Symmetric One-Hot Matching Elector — A Lightweight Microsecond Decoder for Quantum Error Correction,” in Proceedings of International Conference on Computer-Aided Design (ICCAD), accepted.

DAC2025

The following two research presentations were delivered at the ACM/IEEE Design Automation Conference (DAC) 2025, held in San Francisco, USA, from June 22 to June 25, 2025. The presentations were given on June 23 (Guo) and June 24 (Tagata), respectively. DAC is a premier conference in the field of integrated circuit design.

  • X. Guo, H. Awano, and T. Sato, “Weighted Range-Constrained Ising-Model Decoder for
    Quantum Error Correction,” in Proc. ACM/IEEE Design Automation Conference (DAC), pp.1-6, July 2025.
  • H. Tagata, T. Sato, and H. Awano, “Lookup Table-based Multiplication-free All-digital DNN Accelerator Featuring Self-Synchronous Pipeline Accumulation,” in Proc. ACM/IEEE Design Automation Conference (DAC), pp.1-6, July 2025.