Paper accepted: WAHC2021

The following paper has been accepted to ACM Workshop on Encrypted Computing & Applied Homomorphic Cryptography (WAHC).

Kotaro Matsuoka, Yusuke Hoshizuki, Takashi Sato and Song Bian, “Towards better standard cell library: Optimizing compound logic gates for TFHE,” in Proc. ACM Workshop on Encrypted Computing & Applied Homomorphic Cryptography (WAHC), November 2021. (accepted for presentation)

Best Paper Award, the Virtual Reality Society of Japan

Assistant Prof. Shirai received Best Paper Award from the Virtual Reality Society of Japan regarding the paper below (2021/9/13).

Y. Itoh, Y. Ishihara, R. Shirai, K. Fujita, K. Takashima, and T. Onoye, “StickyTouch: A Touch Display with Controllable Local Adhesion,” Transactions of the Virtual Reality Society of Japan (in Japanese), Vol. 25, No. 4, pp. 384-393, 2020.

Paper accepted: Transactions of the Virtual Reality Society of Japan

The paper below has been accepted by Transactions of the Virtual Reality Society of Japan. The first author is Ms. Suzunaga who completed master’s degree at Osaka University in March 2021. This work was carried out at Osaka University with Tohoku University,

S. Suzunaga, K. Fujita, R. Shirai, and Y. Itoh, “CoiLED Display: Striped Flexible Displays Windable Around Objects, ” Transactions of the Virtual Reality Society of Japan (in Japanese), accepted, to appear.

Paper accepted: IEEE Journal of Solid-State Circuits

The paper below has been accepted for publication by IEEE Journal of Solid-State Circuits.
This research is a result of the CREST project on via-switch FPGA.

X. Bai, N. Banno, M. Miyamura, R. Nebashi, K. Okamoto, H. Numata, N. Iguchi, M. Hashimoto, T. Sugibayashi, T. Sakamoto, and M. Tada, “Via-Switch FPGA: 65nm CMOS Implementation and Evaluation,” IEEE Journal of Solid-State Circuits, in press.

Papers accepted: IEICE Transactions on Fundamentals

The following papers have benn accepted for publication by IEICE Transactions on Fundamentals. These works were carried out at Osaka University with Nagoya University and Socionext Inc.
T. Cheng, Y. Masuda, J. Nagayama, Y. Momiyama, J. Chen, and M. Hashimoto, “Activation-Aware Slack Assignment Based Mode-Wise Voltage Scaling for Energy Minimization,” IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, in press.

Y. Masuda, J. Nagayama, T. Cheng, T. Ishihara, Y. Momiyama, and M. Hashimoto, “Low-Power Design Methodology of Voltage Over-Scalable Circuit with Critical Path Isolation and Bit-Width Scaling,” IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, in press.

Paper accepted: IEEE Transactions on Information Forensics and Security

The following paper has been accepted for publication in IEEE Transactions on Information Forensics and Security (TIFS).
This work is a joint research with Nanjing University of Aeronautics and Astronautics.

Song Bian, Dur E Shahwar Kundi, Kazuma Hirozawa, Weiqiang Liu, and Takashi Sato, “APAS: Application-specific accelerators for RLWE-based homomorphic linear transformations,” IEEE Transactions on Information Forensics and Security (TIFS), accepted for publication.