The following paper has been accepted for publication in IEEE Transactions on Electron Devices. This research is the result of a collaborative study with Kyoto Institute of Technology.
At the International Conference on Robotics and Automation (ICRA), held in Atlanta, Georgia, USA from May 19 to 23, 2025, D1 student Hara presented a poster in the Late Breaking Results Poster session.
M1 Awano-Kun’s International Conference paper is accepted to IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), which will be held in Lansing, Michigan, USA, in August 2025.
Kei Awano, You Wu, Kento Okamura, Teruaki Ono, Kohei Sakamoto, Hiroaki Kitaike, Hironori Tagawa, Jin Nakamura, Masaya Kaneko, Yuta Kimura, Hiroaki Nakamura, Shufan Xu, Ruilin Zhang, Kunyang Liu, Hirofumi Shinohara, and Kiichi Niitsu, “A 110-mV 12-pW 0.00006-mm2 7-nm FinFET Self-Oscillating Voltage Doubler Using Vertically Implemented Back-End Metal-Oxide-Metal Capacitors For Small-Formfactor Up-Conversion”, to appear.
The following paper has been accepted to European Signal Processing Conference (EUSIPCO), which will be held in Palermo, Italy in September 2025.
C. Biesinger, H. Awano, and M. Hashimoto, “Window Function-Less DFT with Reduced Noise and Latency for Real-Time Music Analysis,” Proceedings of European Signal Processing Conference (EUSIPCO), to appear.
The following paper has been accepted to International Symposium on Low Power Electronics and Design (ISLPED), which will be held in Iceland in August 2025.
Q. Cheng, H. Zhang, Q. Li, Y. Liang, M. Zhang, Z. Chen, R. Zhang, J. Xiong, M. Huang, L. Lin, and M. Hashimoto, “A Scalable External Memory Access and On-Chip Storage Architecture for Edge-AI Accelerators — Multi-Path Rolling Data Refresh and Layer-Wise Bank Allocation –,” Proceedings of IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), to appear.
Sorry, this entry is only available in 日本語.
The following paper has been accepted to International Test Conference (ITC), which will be held in San Diego, California, USA in September 2025.
Q. Cheng, H. Chi, C. Liang, Y. Chao, H. Zhang, Y. Liang, M. Zhang, W. Liao, J. Xiong, J. Liou, M. Hashimoto, and L. Lin, “Genshin: a Generalized Framework with Software-Hardware Co-Design and Pruned Fault Injection for Reliability Analysis,” Proceedings of International Test Conference (ITC), to appear.
The following paper has been accepted for publication in IEEE Transactions on Nuclear Science. This work is the research achievement of Dr. Takeuchi, who received his Ph.D. degree in September 2024.”
K. Takeuchi, K. Sakamoto, Y. Tsuchiya, T. Kato, R. Nakamura, A. Takeyama, T. Makino, T. Ohshima, M. Hashimoto, H. Shindo, “Cross-section Prediction Method for Proton Direct Ionization Induced Single Event Upset,” in IEEE Transactions on Nuclear Science, doi: 10.1109/TNS.2025.3568455.
This paper has been accepted to IEEE Transactions on Nuclear Science. It is the result of research conducted by Dr. Yang Li during his one-year stay as a special research student.
Yang Li, Masakazu Yoshida, Yuibi Gomi, Yifan Deng, Yukinobu Watanabe, Satoshi Adachi, Masatoshi Itoh, Guohe Zhang, Chaohui He, and Masanori Hashimoto, “Experimental Study of Proton-Induced Radiation Effects on DDR5 Modules,” in IEEE Transactions on Nuclear Science, doi: 10.1109/TNS.2025.3565125.
The following paper has been accepted to the Symposium on VLSI Technology and Circuits. We will be presenting it in Kyoto this June
Quan Cheng, Qiufeng Li, Zhengke Yang, Zhen Kong, Gaoqiang Niu, Yuan Liang, Jiamin Li, Jeong Hoan Park, Wang Liao, Hiromitsu Awano, Takashi Sato, Longyang Lin, Masanori Hashimoto, “A Radiation-Hardened Neuromorphic Imager with Self-Healing Spiking Pixels and Unified Spiking Neural Network for Space Robotics,” Digest of Symposium on VLSI Technology and Circuits, to appear.