Paper accepted: IEEE Transactions on Circuits and Systems II

The following paper is accepted by IEEE Transactions on Circuits and Systems II. This is a collaborative work with Southern University of Science and Technology.

Q. Cheng, L. Dai, M. Huang, A. Shen, W. Mao, M. Hashimoto, H. Yu, “A Low-Power Sparse Convolutional Neural Network Accelerator with Pre-Encoding Radix-4 Booth Multiplier,” in IEEE Transactions on Circuits and Systems II: Express Briefs, doi: 10.1109/TCSII.2022.3231361.