Conference / Workshop

ISLPED 2025

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Mr. Zhang, a D2 student, presented the paper at the IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED 2025) held at the University of Iceland from August 6-8, 2025 (presentation date August 7).

Q. Cheng, H. Zhang, Q. Li, Y. Liang, M. Zhang, Z. Chen, R. Zhang, J. Xiong, M. Huang, L. Lin, and M. Hashimoto, “A Scalable External Memory Access and On-Chip Storage Architecture for Edge-AI Accelerators — Multi-Path Rolling Data Refresh and Layer-Wise Bank Allocation –,” Proceedings of IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), August 2025.

Conference / Workshop

Paper accepted to ICCAD 2025

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The following paper has been accepted at ICCAD (International Conference on Computer-Aided Design) 2025. The results will be presented in Munich in October.

  • Quan Cheng, Huizi Zhang, Chien-Hsing Liang, Mingtao Zhang, Jing-Jia Liou, Jinjun Xiong, Longyang Lin and Masanori Hashimoto, “Tenpura: a General Transient Fault Evaluation and Scope Narrowing Platform for Ultra-Fast Reliability Analysis,” Proceedings of International Conference on Computer-Aided Design (ICCAD), accepted.
  • Xinyi Guo, Geguang Miao, Shinichi Nishizawa, Hiromitsu Awano, Shinji Kimura, and Takashi Sato, “SOME: Symmetric One-Hot Matching Elector — A Lightweight Microsecond Decoder for Quantum Error Correction,” in Proceedings of International Conference on Computer-Aided Design (ICCAD), accepted.
Conference / Workshop/Publication

DAC2025

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The following two research presentations were delivered at the ACM/IEEE Design Automation Conference (DAC) 2025, held in San Francisco, USA, from June 22 to June 25, 2025. The presentations were given on June 23 (Guo) and June 24 (Tagata), respectively. DAC is a premier conference in the field of integrated circuit design.

  • X. Guo, H. Awano, and T. Sato, “Weighted Range-Constrained Ising-Model Decoder for
    Quantum Error Correction,” in Proc. ACM/IEEE Design Automation Conference (DAC), pp.1-6, July 2025.
  • H. Tagata, T. Sato, and H. Awano, “Lookup Table-based Multiplication-free All-digital DNN Accelerator Featuring Self-Synchronous Pipeline Accumulation,” in Proc. ACM/IEEE Design Automation Conference (DAC), pp.1-6, July 2025.
Conference / Workshop/Publication

Paper accepted for publication in IEEE Sensors Letters

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The following paper has been accepted for publication in IEEE Sensors Letters:

Ryosuke Sada, Toshihisa Tanaka, Hisafumi Asaue, Tomoki Shiotani, Masanori Hashimoto, and Ryo Shirai, “Localization of Embedded Sensors in Reinforced Concrete via Time-Series Magnetic Field Sensing and Maximum Likelihood Estimation,” IEEE Sensors Letters, accepted, to appear.

We will also present this work at the IEEE Sensors Conference 2025, which will be held in Vancouver, Canada.

This work was conducted in collaboration with the Laboratory on Innovation for Infrastructures (ITIL), Office of Institutional Advancement and Communications, Kyoto University.

Conference / Workshop

Papers accepted to RADECS 2025

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Our papers have been accepted for oral presentation at the RADECS (RADiation and its Effects on Components and Systems) 2025 Conference. The conference will be held in Antwerp from September 29 to October 3.

  • K. Takeuchi and M. Hashimoto, “Sensitive Volume Allocation Aligned with a Physics-Based Analytical Cross Section Model for Monte Carlo-Based Proton-Induced SEU Simulation,” European Conference on Radiation and Its Effects on Components and Systems (RADECS), to appear.
  • Y. Gomi, K. Takami, R. Yasuda, H. Kanda, M. Fukuda, and M. Hashimoto, “Quasi Event-Wise Measurement of Neutron-Induced Multiple-Cell Upsets in 22-nm and 55-nm SRAMs,” European Conference on Radiation and Its Effects on Components and Systems (RADECS), to appear.
Conference / Workshop

Symposium on VLSI Technology and Circuits 2025

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Dr. Quan Cheng, a Program-Specific Researcher, delivered a presentation on their research findings at the Symposium on VLSI Technology and Circuits 2025, which took place in Kyoto from June 8-12, 2025 (Presentation date June 12).

Q. Cheng, Q. Li, Z. Yang, Z. Kong, G. Niu, Y. Liang, J. Li, J. H. Park, W. Liao, H. Awano, T. Sato, L. Lin, and M. Hashimoto, “A Radiation-Hardened Neuromorphic Imager with Self-Healing Spiking Pixels and Unified Spiking Neural Network for Space Robotics,” Digest of Symposium on VLSI Technology and Circuits, 2025.

Event

Technicalr Seminar

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Four distinguished integrated circuit researchers visited our laboratory on June 9, 2025, to exchange ideas and deliver the following technical lectures:

Title: AI-Empowered Heterogeneous Computing for Physical Design Automation towards Timing Closure
Speaker: Prof. Yibo Lin (Peking University)

Title: Design-Agnostic Bi-Voltage Scaling for Efficient Cryo-CMOS DVFS
Speaker: Prof. Longyang Lin (Southern University of Science and Technology)

Title: Towards 2.5D/3D Composable Chiplets for AI Computing: Heterogenous Integration and Design Exploration
Speaker: Prof. Yu Kevin Cao (University of Minnesota)

Title: Co-Designing Algorithms and Hardware for Efficient Machine Learning System
Speaker: Prof. Caiwen Ding (University of Minnesota)