ASP-DAC 2026

At the IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC 2026) held in Lantau Island, Hong Kong, from January 19 to 22, 2026, Mingtao, Haoyuan, and Masanori presented the following papers
(presentation dates: Jan. 20, 22, and 22, resp.). Takashi served as the TPC chair for the conference.

  • Mingtao Zhang, Quan Cheng, Masanori Hashimoto, “A SET Fault Injection Framework Towards Exhaustive System-Level Impact Evaluation,” in Proc. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), January 2026.
  • Haoyuan Li, Masami Utsunomiya, Ryuto Seki, Feng Liang, and Takashi Sato, “EMESN: An extended MOSFET reservoir computing architecture for echo state networks with hardware-software co-optimization,” in Proc. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), January 2026.
  • Quan Cheng, Haoyuan Li, Weirong Dong, Mingqiang Huang, Longyang Lin, and Masanori Hashimoto, “Gundam: A Generalized Unified Design and Analysis Model for Matrix Multiplication on Edge,” in Proc. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), January 2026.

Publication at IACR TCHES – YATA

The following paper has been published at IACR TCHES. The paper will be presented at International Conference on Cryptographic Hardware and Embedded Systems (CHES) in September 2026.

  • K. Matsuoka, and T. Sato, “YATA: Yet Another TFHE Accelerator with Key Compression and Radix-8 NTT,” IACR Transactions on Cryptographic Hardware and Embedded Systems, 2026(1), pp.325-352, 2026. doi: 10.46586/tches.v2026.i1.325-352

Paper Accepted for Publication in IEEE Transactions on Computers

The following paper has been accepted for publication in IEEE Transactions on Computers. This research is the result of a collaborative study with Waseda University.

  • Xinyi Guo, Geguang Miao, Shinishi Nishizawa, Shinji Kimura, and Takashi Sato, “Prime factorization using partially constrained multiple quantum annealing with analytical and pattern-based variable reduction,” IEEE Transactions on Computers, (accepted).

論文採択 ICMTS2026

The following paper has been accepted for presentation at the IEEE International Conference on Microelectronic Test Structures (ICMTS) 2026,
which will be held in Matsue, Japan, from March 23 to 26, 2026.

  • Ryuto Seki, Masami Utsunomiya, Yu-Guang Chen, Hiromitsu Awano, and Takashi Sato, “Improving Robustness of Leakage-Based MOSFET Reservoir Computing Using Adaptive Pulse-Width Control”, IEEE International Conference on Microelectronic Test Structures (ICMTS) 2026 (accepted).

A Paper accepted for CICC2026

The following paper has been accepted to CICC (IEEE Custom Integrated Circuits Conference) 2026. We will present the results in April 2026.

  • Z. Chen, K. Liu, W. Dong, Q. Cheng, J. Li, L. Lin, and T. Sato, “An 83-F^2 2T PUF featuring isolated hot-carrier injection and lightweight majority-voting-based strong PUF mode,” in Proc. IEEE Custom Integrated Circuits Conference (CICC), April 2026 (accepted).

Paper accepted for IRPS 2026

The following paper has been accepted for IRPS 2026. It will be presented in Tucson, Arizona, in March 2026.

Yuibi Gomi, Kazusa Takami, Koyo Morita, and Masanori Hashimoto, “Proton-Induced Distant MCU Analysis with Quasi Event-Wise Dynamic Measurement in 22-nm and 55-nm SRAMs,” Proceedings of International Reliability Physics Symposium (IRPS), to appear.

Technical seminar

Two distinguished EDA researchers visited our laboratory to exchange ideas and deliver the following technical lectures (November 28, 2025).

Title: Physical Design for Heterogeneous Integration: Challenges and Opportunities
Speaker: Prof. YaoWen Chang (National Taiwan University)

Title: Automated Finger Placement for Wire-Bonding Packages Using a Double-Square Analytical Framework
Speaker: Prof. Jai-Ming Lin (National Cheng Kung University)

Papers accepted for ISSCC 2026

The following papers have been accepted for ISSCC 2026.
We will present our results in San Francisco in February 2026.

S. Xu*, K. Liu*, L. Chan, H. Tagawa, H. Shinohara, K. Niitsu, “A Sub-Threshold All-nMOS Reconfigurable PUF with Secure Configuration Selection for Stable 6-Bits/Cell,” Technical Digest of International Solid-State Circuits Conference (ISSCC), to appear. (*ECAs)

Q. Cheng*, Z. Yang*, H. Li, Q. Li, Z. Kong, G. Niu, Y. Liang, J. Li, J. Yoo, M. Hashimoto, and L. Lin, “A Radiation-Hardened Self-Healing Cmos Imager with Online Pixel/Logic Annealing and Tile-Adaptive Compression for Space Applications,” Technical Digest of International Solid-State Circuits Conference (ISSCC), to appear. (*ECAs)