At the International Conference on Computer Design (ICCD), held in Milan, Italy, from November 18 to 20, 2024, D2 student Zhang presented his research findings (presentation date: November 18).
M. Zhang, Q. Cheng, H. Awano, L. Lin, and M. Hashimoto, “S3M: Static Semi-Segmented Multipliers for Energy-Efficient DNN Inference Accelerators,” Proceedings of IEEE International Conference on Computer Design (ICCD), 2024.
The following paper has been accepted for DATE 2025. The results will be presented in Lyon in March 2025.
Quan Cheng, Wang Liao, Ruilin Zhang, Hao Yu, Longyang Lin and Masanori Hashimoto, HachiFI: A Lightweight SoC Architecture-Independent Fault-Injection Framework for SEU Impact Evaluation, Proc. Design, Automation and Test in Europe Conference (DATE), to appear.
At Design Gaia 2024, held in a hybrid format from November 12 to 14, 2024 (venue: Compal Hall in Oita City), M2 student Yoshida presented the following work (both oral and poster presentations were on the 12th).
The following paper has been accepted for publication in the IEEE Access Journal. This study was conducted in collaboration with OMRON Corporation.
R. Shirai, G. Nakao, and M. Hashimoto, “Analytical Equivalent Circuit Extraction of Foreign Metal Objects in WPT Systems,” IEEE Access Journal, DOI: 10.1109/ACCESS.2024.3500008 in press.
Dr. Zheyu Yan from the University of Notre Dame, who visited our laboratory, gave the following seminar talk (2024/10/24).
“Software-Hardware Co-Design of Neural Network Accelerators using Emerging Technologies”
Sorry, this entry is only available in 日本語.
At IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS) 2024, held in Abu Dhabi, United Arab Emirates, from 14 to 18 October, Master student Hara gave an oral presentation of the following paper, which was accepted by IEEE Robotics and Automation Letters (presentation date: 16 October). Along with ICRA, IROS is considered one of the largest and most influential conferences in the field of robotics. Numerous companies set up exhibition stands outside the venue and various competitions, such as drone races, were held, making it a very successful conference.
The following paper has been accepted for publication in IEEE Open Journal of Circuits and Systems (OJCAS).
H. Tagata, T. Sato, and H. Awano, “Double MAC on a Cell: A 22-nm 8T-SRAM based Analog In-Memory Accelerator for Binary/Ternary Neural Networks Featuring Split Wordline,” in IEEE Open Journal of Circuits and Systems, accepted.
The following poster paper has been accepted for SIGGRAPH Asia 2024. We will present the results in Tokyo in December.
Y. Maegawa, M. Hashimoto, and R. Shirai, “Development of Tiny Wireless Position Tracker Enabling Real-Time Intuitive 3D Modeling,” Proceedings of SIGGRAPH Asia, to appear.
At the Quantum Computing and Engineering (QCE) Conference, held in Montreal, Canada, from September 15 to 20, 2024, M1 student Wang gave a poster presentation.
R. Wang, T. Sato, H. Awano, “Exploring Surface Code Decoding via Cryo-CMOS for Fault-Tolerant Quantum Computers,” International Conference on Quantum Computing and Engineering (QCE), 2024.
